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Job details

Requisition Number 17-0233
Title Design Engineer - Verification
Location United States-Multiple Locations
Position Type Full-Time
Description
Primary Duties and Responsibilities:
•	Create testbench specifications and coverage plans Implement constrained-random sequences, agents, and environments using the UVM methodology
•	Collaborate with designers to debug failures
•	Implement functional and coverage assertions for stimulus and corner cases, and work to close coverage
•	Interface with prototype lab and software teams after component integration

Key Qualifications include:
•	BS degree or equivalent experience; MS preferred
•	Experience architecting and creating test benches with standard verification languages
•	Fluency with at least one programming language (Golang, Python/Perl, or similar)
•	Excellent communication skills including the ability to clearly articulate concepts (in verbal and written form) to stakeholders inside Cray
•	Ability to work well in a distributed team environment with lively debate
•	Experience implementing automation infrastructure
•	Experience integrating 3rd-party verification IP for industry-standard busses

We are proud to be an Equal Opportunity Employer including protected veterans and individuals with disabilities.
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